The 74HC4052 is a dual 4-channel analog multiplexer/demultiplexer with common select logic. Each multiplexer has four independent inputs/outputs (pins
nY3) and a common input/output (pin
The common channel select logics include two digital select inputs (pins
S1) and an active LOW enable input (pin
E). When pin
LOW, one of the four switches is selected (low-impedance ON-state) with pins
S1. When pin
HIGH, all switches are in the high-impedance OFF-state, independent of pins
GND are the supply voltage pins for the digital control inputs (pins
GND ranges are 2.0 V to 10.0 V. The analog inputs/outputs (pins
nZ) can swing between
VCC as a positive limit and
VEE as a negative limit.
VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer,
VEE is connected to
GND (typically ground).
The 74HC4052 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in compliance with JEDEC standard no. 7A.